On 6/16/2020 1:19 PM, Matthew Hagan wrote: > > > On 14/06/2020 23:28, Florian Fainelli wrote: >> >> >> On 6/9/2020 9:58 AM, Matthew Hagan wrote: >>> According to gmac/src/et/sys/et_linux.c, IORESOURCE_MEM end address for each >>> mac is IPROC_GMACx_REG_BASE+0xbff. >> >> The datasheet shows an entire GMAC to end at 0x1000 from its base offset >> which is likely what was used to construct this DTS, I do not believe >> this is a functional change, and if we look at the register details, the >> last register starts at 0xb44 so 0xc00 is giving a little bit of >> headroom. In practice it does not change anything since you are still >> going to need a full 4KB page frame to map the registers. >> >>> >>> The FA2 mailbox is specified at 0x18025000 but should actually be 0x18025c00, >>> length 0x400 according to socregs_nsp.h and board_bu.c. amac3 is at 25000. >> >> Yes, FA2 definitively start 0x18025c00, and ends 0x400 later, so I did >> split this patch in three patches: >> >> - one that fixes the FA2 base address, which can be queued to stable >> kernel branches >> - one that changes the AMAC register size >> - one that adds the AMAC3 > > Since AMAC3 has been added with interrupt 150, should the mailbox > interrupt not also be incremented to 151? Yes indeed, now corrected: https://github.com/Broadcom/stblinux/commit/ac4e106d8934a5894811fc263f4b03fc8ed0fb7a (have not merged it back into devicetree/next yet) -- Florian
