[PATCH 2/3] ARM: dts: NSP: Correct amac_base lengths, mailbox reg and add amac3

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According to gmac/src/et/sys/et_linux.c, IORESOURCE_MEM end address for each
mac is IPROC_GMACx_REG_BASE+0xbff.

The FA2 mailbox is specified at 0x18025000 but should actually be 0x18025c00,
length 0x400 according to socregs_nsp.h and board_bu.c. amac3 is at 25000.

Signed-off-by: Matthew Hagan <mnhagan88@xxxxxxxxx>
---
 arch/arm/boot/dts/bcm-nsp.dtsi | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 920c0f561e5c..512720f39e04 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -47,6 +47,7 @@ aliases {
 		ethernet0 = &amac0;
 		ethernet1 = &amac1;
 		ethernet2 = &amac2;
+		ethernet3 = &amac3;
 	};
 
 	cpus {
@@ -231,7 +232,7 @@ sdio: sdhci@21000 {
 
 		amac0: ethernet@22000 {
 			compatible = "brcm,nsp-amac";
-			reg = <0x022000 0x1000>,
+			reg = <0x022000 0x0c00>,
 			      <0x110000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
@@ -241,7 +242,7 @@ amac0: ethernet@22000 {
 
 		amac1: ethernet@23000 {
 			compatible = "brcm,nsp-amac";
-			reg = <0x023000 0x1000>,
+			reg = <0x023000 0x0c00>,
 			      <0x111000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
@@ -251,7 +252,7 @@ amac1: ethernet@23000 {
 
 		amac2: ethernet@24000 {
 			compatible = "brcm,nsp-amac";
-			reg = <0x024000 0x1000>,
+			reg = <0x024000 0x0c00>,
 			      <0x112000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
@@ -259,10 +260,20 @@ amac2: ethernet@24000 {
 			status = "disabled";
 		};
 
-		mailbox: mailbox@25000 {
-			compatible = "brcm,iproc-fa2-mbox";
-			reg = <0x25000 0x445>;
+		amac3: ethernet@25000 {
+			compatible = "brcm,nsp-amac";
+			reg = <0x025000 0x0c00>,
+			      <0x113000 0x1000>;
+			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
+			status = "disabled";
+		};
+
+		mailbox: mailbox@25c00 {
+			compatible = "brcm,iproc-fa2-mbox";
+			reg = <0x25c00 0x400>;
+			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 			#mbox-cells = <1>;
 			brcm,rx-status-len = <32>;
 			brcm,use-bcm-hdr;
-- 
2.25.4




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