Hello,
This series adds mailbox driver support for Qualcomm Inter Processor
Communications Controller (IPCC) block found in MSM chipsets. This block
is used to route interrupts between modems, DSPs and APSS (Application
Processor Subsystem).
The driver is modeled as a mailbox+irqchip driver. The irqchip part helps
in receiving the interrupts from the IPCC clients such as modems, DSPs,
PCI-E etc... and forwards them to respective entities in APSS.
On the other hand, the mailbox part is used to send interrupts to the IPCC
clients from the entities of APSS.
This series is tested on SM8250-MTP board.
Thanks,
Mani
Changes in v2:
* Moved from soc/ to mailbox/
* Switched to static mbox channels
* Some misc cleanups
Manivannan Sadhasivam (3):
dt-bindings: mailbox: Add devicetree binding for Qcom IPCC
mailbox: Add support for Qualcomm IPCC
MAINTAINERS: Add entry for Qualcomm IPCC driver
.../bindings/mailbox/qcom-ipcc.yaml | 77 +++++
MAINTAINERS | 8 +
drivers/mailbox/Kconfig | 10 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/qcom-ipcc.c | 286 ++++++++++++++++++
include/dt-bindings/mailbox/qcom-ipcc.h | 33 ++
6 files changed, 416 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
create mode 100644 drivers/mailbox/qcom-ipcc.c
create mode 100644 include/dt-bindings/mailbox/qcom-ipcc.h
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2.17.1
