On Wed, Sep 11, 2019 at 01:04:46PM +0200, Maciej Falkowski wrote: > Convert Samsung Exynos IOMMU H/W, System Memory Management Unit > to newer dt-schema format. > > Update clock description. > > Signed-off-by: Maciej Falkowski <m.falkowski@xxxxxxxxxxx> > Signed-off-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx> > --- > Hi Krzysztof, > > Thank you for feedback. > > v3: > > - remove obsolete interrupts description and > set its maxItems to one. There are some incompatible > files which will be fixed with another patch. > > - clock-names pattern is changed to your more precise > version. I also added option "pclk" + "aclk" as some > bindings are also using it. > > Best regards, > Maciej Falkowski > --- > .../bindings/iommu/samsung,sysmmu.txt | 67 ----------- > .../bindings/iommu/samsung,sysmmu.yaml | 112 ++++++++++++++++++ > 2 files changed, 112 insertions(+), 67 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt > create mode 100644 Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml > diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml > new file mode 100644 > index 000000000000..a8141d6c326a > --- /dev/null > +++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml > @@ -0,0 +1,112 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iommu/samsung,sysmmu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit) > + > +maintainers: > + - Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > + > +description: |+ > + Samsung's Exynos architecture contains System MMUs that enables scattered > + physical memory chunks visible as a contiguous region to DMA-capable peripheral > + devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth. > + > + System MMU is an IOMMU and supports identical translation table format to > + ARMv7 translation tables with minimum set of page properties including access > + permissions, shareability and security protection. In addition, System MMU has > + another capabilities like L2 TLB or block-fetch buffers to minimize translation > + latency. > + > + System MMUs are in many to one relation with peripheral devices, i.e. single > + peripheral device might have multiple System MMUs (usually one for each bus > + master), but one System MMU can handle transactions from only one peripheral > + device. The relation between a System MMU and the peripheral device needs to be > + defined in device node of the peripheral device. > + > + MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System > + MMUs. > + * MFC has one System MMU on its left and right bus. > + * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU > + for window 1, 2 and 3. > + * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and > + the other System MMU on the write channel. > + > + For information on assigning System MMU controller to its peripheral devices, > + see generic IOMMU bindings. > + > +properties: > + compatible: > + const: samsung,exynos-sysmmu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + oneOf: > + - items: > + - const: sysmmu > + - items: > + - const: sysmmu > + - const: master > + - items: > + - const: aclk > + - const: pclk > + - items: > + - const: pclk > + - const: aclk Sigh. I'd prefer you fix the order in whichever case is less common. > + description: | > + Should be "sysmmu" with optional "master" > + or a pair "aclk" with "pclk". No need to describe what the schema already says. > + > + "#iommu-cells": > + const: 0 > + > + power-domains: > + $ref: /schemas/types.yaml#/definitions/phandle No need to define common property types. Just 'maxItems: 1' is enough. > + description: | > + Required if the System MMU is needed to gate its power. > + Please refer to the following document: > + Documentation/devicetree/bindings/power/pd-samsung.txt > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - "#iommu-cells" > + > +examples: > + - | > + gsc_0: gsc@13e00000 { > + compatible = "samsung,exynos5-gsc"; > + reg = <0x13e00000 0x1000>; > + interrupts = <0 85 0>; > + power-domains = <&pd_gsc>; > + clocks = <&clock 0>; // CLK_GSCL0 > + clock-names = "gscl"; > + iommus = <&sysmmu_gsc0>; > + }; > + > + sysmmu_gsc0: sysmmu@13e80000 { This should be: iommu@... > + compatible = "samsung,exynos-sysmmu"; > + reg = <0x13E80000 0x1000>; > + interrupt-parent = <&combiner>; > + interrupts = <2 0>; > + clock-names = "sysmmu", "master"; > + clocks = <&clock 0>, // CLK_SMMU_GSCL0 > + <&clock 0>; // CLK_GSCL0 > + power-domains = <&pd_gsc>; > + #iommu-cells = <0>; > + }; > + > -- > 2.17.1 >
