On Wed, Jul 17, 2019 at 3:28 AM Fabio Estevam <festevam@xxxxxxxxx> wrote:
>
> On Tue, Jul 16, 2019 at 12:37 PM Dong Aisheng <aisheng.dong@xxxxxxx> wrote:
>
> > + uart0_lpcg: clock-controller@5a460000 {
> > + reg = <0x5a460000 0x10000>;
> > + #clock-cells = <1>;
> > + clocks = <&clk IMX_ADMA_UART0_CLK>,
> > + <&dma_ipg_clk>;
>
> Putting the clocks into a single line helps readability, even if it is
> over 80 col.
>
Is this a new rule? I'm not aware of this requirement.
By looking at imx8mq.dts, it seems also have not followed that rule.
I'm a bit concern that it might be super long for other lpcgs with 5 clocks.
e.g. enet.
Regards
Aisheng
> > + bit-offset = <0 16>;
> > + clock-output-names = "uart0_lpcg_baud_clk",
> > + "uart0_lpcg_ipg_clk";
>
> Same here.
