On Tue, Jul 2, 2019 at 5:37 PM Martin Blumenstingl
<martin.blumenstingl@xxxxxxxxxxxxxx> wrote:
>
> Hi Rob,
>
> On Wed, Jul 3, 2019 at 1:34 AM Rob Herring <robh+dt@xxxxxxxxxx> wrote:
> [...]
> > > + lantiq,rcu:
> > > + maxItems: 1
> > > + description: phandle to the RCU syscon
> >
> > You need to define the type (and drop maxItems):
> >
> > $ref: /schemas/types.yaml#/definitions/phandle
> thank you for this hint - the examples I used didn't have it
>
> > > +
> > > + lantiq,rcu-endian-offset:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: the offset of the endian registers for this PHY instance in the RCU syscon
> > > +
> > > + lantiq,rcu-big-endian-mask:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: the mask to set the PDI (PHY) registers for this PHY instance to big endian
> > > +
> > > +required:
> > > + - "#phy-cells"
> > > + - compatible
> > > + - reg
> > > + - clocks
> > > + - clock-names
> > > + - resets
> > > + - reset-names
> > > + - lantiq,rcu
> > > + - lantiq,rcu-endian-offset
> > > + - lantiq,rcu-big-endian-mask
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + pcie0_phy: phy@106800 {
> > > + compatible = "lantiq,vrx200-pcie-phy";
> > > + reg = <0x106800 0x100>;
> > > + lantiq,rcu = <&rcu0>;
> > > + lantiq,rcu-endian-offset = <0x4c>;
> > > + lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */
> > > + big-endian;
> >
> > The example will fail to validate because big-endian is not listed as
> > a property and you have 'additionalProperties: false'. So you have to
> > either list big-endian or drop additionalProperties.
> good catch, thank you.
> I'll add big-endian and little-endian as allowed (but optional) properties
>
> > Note that the examples are validated against the schema in linux-next now.
> I tested this with yesterday's linux-next tree and it didn't fail for me
> do you have any hint how I can run this validation myself?
It's not a default target:
make dt_binding_check
Rob
