The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC. This series adds support for the DDRPERFM via a new stm32-ddr-pmu driver, registered into the perf framework. This driver is inspired from arch/arm/mm/cache-l2x0-pmu.c --- Changes from v1: - add 'resets' description (bindings) and using (driver). Thanks Rob. - rebase on 5.2-rc1 (that includes the ddrperfm clock control patch). Gerald Baeza (5): Documentation: perf: stm32: ddrperfm support dt-bindings: perf: stm32: ddrperfm support perf: stm32: ddrperfm driver creation ARM: configs: enable STM32_DDR_PMU ARM: dts: stm32: add ddrperfm on stm32mp157c .../devicetree/bindings/perf/stm32-ddr-pmu.txt | 20 + Documentation/perf/stm32-ddr-pmu.txt | 41 ++ arch/arm/boot/dts/stm32mp157c.dtsi | 9 + arch/arm/configs/multi_v7_defconfig | 1 + drivers/perf/Kconfig | 6 + drivers/perf/Makefile | 1 + drivers/perf/stm32_ddr_pmu.c | 512 +++++++++++++++++++++ 7 files changed, 590 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt create mode 100644 Documentation/perf/stm32-ddr-pmu.txt create mode 100644 drivers/perf/stm32_ddr_pmu.c -- 2.7.4
