The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC.
This documentation indicates how to enable stm32-ddr-pmu driver on
DDRPERFM peripheral, via the device tree.
Signed-off-by: Gerald Baeza <gerald.baeza@xxxxxx>
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.../devicetree/bindings/perf/stm32-ddr-pmu.txt | 20 ++++++++++++++++++++
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+* STM32 DDR Performance Monitor (DDRPERFM)
+
+Required properties:
+- compatible: must be "st,stm32-ddr-pmu".
+- reg: physical address and length of the registers set.
+- clocks: list of phandles and specifiers to all input clocks listed in
+ clock-names property.
+- clock-names: "bus" corresponds to the DDRPERFM bus clock and "ddr" to
+ the DDR frequency.
+- resets: phandle to the reset controller and DDRPERFM reset specifier
+
+Example:
+ ddrperfm: perf@5a007000 {
+ compatible = "st,stm32-ddr-pmu";
+ reg = <0x5a007000 0x400>;
+ clocks = <&rcc DDRPERFM>, <&rcc PLL2_R>;
+ clock-names = "bus", "ddr";
+ resets = <&rcc DDRPERFM_R>;
+ };
+
--
2.7.4
