On Mon, Apr 07, 2014 at 02:24:07PM +0200, Michal Simek wrote: > Device-tree BSP and in 2014.01 there will be new BSP which just > generate them directly from the Vivado tools which just target your > reference design. You can connect your custom IP (or Xilinx or 3rd > party) directly to the GIC which using different IRQ sensitivity > with whatever register addresses and make no sense to write it by > hand. On our Zynq design here we ended up being unwilling to use platform generation from Vivado. Basically all our IP was custom, so there was no win at all to invoking the complexity of the automatic tools. Thus we write the DT by hand, and our DT is complex, integrating peripherals that span two FPGAs. I think the in-kernel DT should use the kernel conventions, which means using #include and the binding constants over magic values. Jason -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
