On Wed, Jan 16, 2019 at 02:51:31PM +0530, Yash Shah wrote: > On Wed, Jan 16, 2019 at 1:41 AM Uwe Kleine-König > <u.kleine-koenig@xxxxxxxxxxxxxx> wrote: > > > > Hello, > > > > this is v3, right? It is helpful to point this out to ease reviewing. > > Yes, it is v3. Will take care of this in v4. > > > > > On Fri, Jan 11, 2019 at 01:52:43PM +0530, Yash Shah wrote: > > > DT documentation for PWM controller added with updated compatible > > > string. > > > > Not sure what was updated here. But assuming this is compared to v2 this > > is not a helpful info in the commit log. > > Ok, will remove the 'updated compatible string' part. > > > > > > Signed-off-by: Wesley W. Terpstra <wesley@xxxxxxxxxx> > > > [Atish: Compatible string update] > > > Signed-off-by: Atish Patra <atish.patra@xxxxxxx> > > > Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx> > > > --- > > > .../devicetree/bindings/pwm/pwm-sifive.txt | 37 ++++++++++++++++++++++ > > > 1 file changed, 37 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt > > > > > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > > > new file mode 100644 > > > index 0000000..e0fc22a > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > > > @@ -0,0 +1,37 @@ > > > +SiFive PWM controller > > > + > > > +Unlike most other PWM controllers, the SiFive PWM controller currently only > > > +supports one period for all channels in the PWM. This is set globally in DTS. > > > +The period also has significant restrictions on the values it can achieve, > > > +which the driver rounds to the nearest achievable frequency. > > > + > > > +Required properties: > > > +- compatible: Please refer to sifive-blocks-ip-versioning.txt > > > > While the description was too verbose in v2, this is too short. You > > should at least mention something like "sifive,pwmX" and > > "sifive,$cpuname-pwm" (or how ever that scheme works). > > Will mention the above. > > > > > > +- reg: physical base address and length of the controller's registers > > > +- clocks: Should contain a clock identifier for the PWM's parent clock. > > > +- #pwm-cells: Should be 2. > > > + The first cell is the PWM channel number > > > + The second cell is the PWM polarity > > > > I'd drop these two lines and refer to bindings/pwm/pwm.txt instead. > > Will be done. I don't think you can do that. You're omitting the second cell representing the period, so this is different from the standard binding and therefore needs to be explicit. That said, given the rest of the discussion in the other threads, maybe it no longer makes sense to set the period on the whole block, but rather just note in the binding that all PWMs need to run at the same period. If the driver already refuses to apply incompatible periods, your users are going to notice that they've got the DT wrong. This would have the advantage that you can use the standard bindings. Thierry
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