Hello, this is v3, right? It is helpful to point this out to ease reviewing. On Fri, Jan 11, 2019 at 01:52:43PM +0530, Yash Shah wrote: > DT documentation for PWM controller added with updated compatible > string. Not sure what was updated here. But assuming this is compared to v2 this is not a helpful info in the commit log. > Signed-off-by: Wesley W. Terpstra <wesley@xxxxxxxxxx> > [Atish: Compatible string update] > Signed-off-by: Atish Patra <atish.patra@xxxxxxx> > Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx> > --- > .../devicetree/bindings/pwm/pwm-sifive.txt | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > new file mode 100644 > index 0000000..e0fc22a > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > @@ -0,0 +1,37 @@ > +SiFive PWM controller > + > +Unlike most other PWM controllers, the SiFive PWM controller currently only > +supports one period for all channels in the PWM. This is set globally in DTS. > +The period also has significant restrictions on the values it can achieve, > +which the driver rounds to the nearest achievable frequency. > + > +Required properties: > +- compatible: Please refer to sifive-blocks-ip-versioning.txt While the description was too verbose in v2, this is too short. You should at least mention something like "sifive,pwmX" and "sifive,$cpuname-pwm" (or how ever that scheme works). > +- reg: physical base address and length of the controller's registers > +- clocks: Should contain a clock identifier for the PWM's parent clock. > +- #pwm-cells: Should be 2. > + The first cell is the PWM channel number > + The second cell is the PWM polarity I'd drop these two lines and refer to bindings/pwm/pwm.txt instead. > +- sifive,approx-period-ns: the driver will get as close to this period as it can As already said for v2: I'd drop "approx-". > +- interrupts: one interrupt per PWM channel > + > +PWM RTL that corresponds to the IP block version numbers can be found > +here: > + > +https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm > + > +Further information on the format of the IP > +block-specific version numbers can be found in > +Documentation/devicetree/bindings/sifive/sifive-blocks-ip-versioning.txt > + > +Examples: > + > +pwm: pwm@10020000 { > + compatible = "sifive,fu540-c000-pwm","sifive,pwm0"; > + reg = <0x0 0x10020000 0x0 0x1000>; > + clocks = <&tlclk>; > + interrupt-parent = <&plic>; > + interrupts = <42 43 44 45>; > + #pwm-cells = <2>; > + sifive,approx-period-ns = <1000000>; > +}; > -- > 1.9.1 > > -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |
