On Wednesday 12 March 2014, Loc Ho wrote:
> + sata01clk: sata01clk@1f21c000 {
> + compatible = "apm,xgene-device-clock";
> + #clock-cells = <1>;
> + clocks = <&socplldiv2 0>;
> + clock-names = "socplldiv2";
> + reg = <0x0 0x1f21c000 0x0 0x1000>;
> + reg-names = "csr-reg";
> + clock-output-names = "sata01clk";
> + csr-offset = <0x4>;
> + csr-mask = <0x05>;
> + enable-offset = <0x0>;
> + enable-mask = <0x39>;
Same comment about the "clock-names" as in the first patch here.
Arnd
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