On Wed, 2017-03-29 at 13:51 -0700, Brendan Higgins wrote: > so maybe instead of setting a hard limit like I did, maybe the best > thing is to just check and see what the base_clk gets set to and if > it gets set to zero, we turn on high speed mode. What do you think? Ah maybe. Did you scope it to see if clock_hi/low do indeed apply in high speed mode ? I wonder if that bit does other things.. I would be interesting to check. Ohterwise why have the bit rather than just have the driver write 0 to the divisor ? The doc for the high speed mode bit says "high speed mode (3.4Mbps)" which is why I, maybe incorrectly, assumed it was a fixed frequency. Anyway, not a huge deal at this point, but something to look into at some stage. Cheers, Ben. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
