On Mon, Oct 31, 2016 at 04:55:26PM +0200, Georgi Djakov wrote:
> Add a driver for the A53 Clock Controller. It is a hardware block that
> implements a combined mux and half integer divider functionality. It can
> choose between a fixed-rate clock or the dedicated A53 PLL. The source
> and the divider can be set both at the same time.
>
> This is required for enabling CPU frequency scaling on platforms like
> MSM8916.
>
> Signed-off-by: Georgi Djakov <georgi.djakov@xxxxxxxxxx>
> ---
> .../devicetree/bindings/clock/qcom,a53cc.txt | 23 ++++
> drivers/clk/qcom/Kconfig | 8 ++
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/a53cc.c | 152 +++++++++++++++++++++
> 4 files changed, 184 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53cc.txt
> create mode 100644 drivers/clk/qcom/a53cc.c
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,a53cc.txt b/Documentation/devicetree/bindings/clock/qcom,a53cc.txt
> new file mode 100644
> index 000000000000..82d1634a2713
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,a53cc.txt
> @@ -0,0 +1,23 @@
> +Qualcomm A53 CPU Clock Controller Binding
> +------------------------------------------------
> +The A53 CPU Clock Controller is hardware, which provides a combined
> +mux and divider functionality for the CPU clocks. It can choose between
> +a fixed rate clock and the dedicated A53 PLL. This hardware block is used
> +on platforms such as msm8916.
> +
> +Required properties :
> +- compatible : shall contain:
> +
> + "qcom,a53cc-msm8916"
Same comment on the ordering. With that, for the binding:
Acked-by: Rob Herring <robh@xxxxxxxxxx>
> +
> +- reg : shall contain base register location and length
> + of the APCS region
> +- #clock-cells : shall contain 1
> +
> +Example:
> +
> + apcs: syscon@b011000 {
> + compatible = "qcom,a53cc-msm8916";
> + reg = <0x0b011000 0x1000>;
> + #clock-cells = <1>;
> + };
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