On 06/02, Banavathi, Pradeep wrote: > The PLLs on IPQ4019 cannot be reconfigured by design. The > recommendation is to program these PLLS only once. Since, the > Bootloaders configure the PLLs and clocks already. we did not > support the recalc rate and marked them as fixed clocks. > (Please don't top post) That doesn't matter. We recalculate PLL rates on all other qcom SoCs by reading the hardware even though an overwhelming majority of them are fixed by the bootloader. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
