On 05/30, Abhishek Sahu wrote: > Modified the fixed clock rate initialization in the IPQ4019 clock > probe function with correct values. > > Also some of the fixed clocks entries were not added in the current > driver file so added the same. > > Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx> This was a temporary solution until the PLL recalc code could be written. When is the real clk driver coming so we can get rid of these fixed rate clks being registered in this driver? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
