On Thursday 17 March 2016 07:56 AM, David Lechner wrote: > Device tree binding for new phy-da8xx-usb driver. > > Signed-off-by: David Lechner <david@xxxxxxxxxxxxxx> > --- > > v2 changes: This is new patch in v2. > > > .../devicetree/bindings/phy/phy-da8xx-usb.txt | 34 ++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-da8xx-usb.txt > > diff --git a/Documentation/devicetree/bindings/phy/phy-da8xx-usb.txt b/Documentation/devicetree/bindings/phy/phy-da8xx-usb.txt > new file mode 100644 > index 0000000..ed6b710 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/phy-da8xx-usb.txt > @@ -0,0 +1,34 @@ > +TI DaVinci DA8XX USB PHY > + > +Required properties: > + - compatible: must be "ti,da830-usbphy". > + - #phy-cells: must be 1. > + - reg : Address and length of the CFGCHIP2 register. I am not sure passing CFGCHIP2 register as reg property to the phy is future proof. At some point, we do want to move to common clock framework and at that point USB clocks controlled by CFGCHIP2 will be a separate driver needing access to the same register. So I think the CFGCHIP2 access in USB phy driver should happen through a syscon phandle. This needs to happen now, not later since we cannot break DT backward-compatibility. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
