Hi Krzysztof, Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx> writes: > On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and > 12 steps for big core (700-1800 MHz). Add respective cooling cells. > > Signed-off-by: Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx> > > --- > > Changes since v1: > 1. Add cooling properties to all CPUs (suggested by Viresh). > --- > arch/arm/boot/dts/exynos5420-cpus.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi > index 261d25173f61..5c052d7ff554 100644 > --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi > +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi > @@ -33,6 +33,9 @@ > clock-frequency = <1800000000>; > cci-control-port = <&cci_control1>; > operating-points-v2 = <&cluster_a15_opp_table>; > + cooling-min-level = <0>; > + cooling-max-level = <11>; Although the above two properties are defined they aren't parsed in the kernel. Setting min / max extents for cooling devices via cooling maps does work though. [...] -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
