Hi Kan, > On Sep 29, 2021, at 9:35 AM, Liang, Kan <kan.liang@xxxxxxxxx> wrote: > >>>> - get confirmation that clearing GLOBAL_CTRL is suffient to supress >>>> PEBS, in which case we can simply remove the PEBS_ENABLE clear. >>> >>> How should we confirm this? Can we run some tests for this? Or do we >>> need hardware experts' input for this? >> >> I'll put it on the list to ask the hardware people when I talk to them next. But >> maybe Kan or Andi know without asking. > > If the GLOBAL_CTRL is explicitly disabled, the counters do not count anymore. > It doesn't matter if PEBS is enabled or not. > > See 6c1c07b33eb0 ("perf/x86/intel: Avoid unnecessary PEBS_ENABLE MSR > access in PMI "). We optimized the PMU handler base on it. Thanks for these information! IIUC, all we need is the following on top of bpf-next/master: diff --git i/arch/x86/events/intel/core.c w/arch/x86/events/intel/core.c index 1248fc1937f82..d0d357e7d6f21 100644 --- i/arch/x86/events/intel/core.c +++ w/arch/x86/events/intel/core.c @@ -2209,7 +2209,6 @@ intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries, unsigned int /* must not have branches... */ local_irq_save(flags); __intel_pmu_disable_all(false); /* we don't care about BTS */ - __intel_pmu_pebs_disable_all(); __intel_pmu_lbr_disable(); /* ... until here */ return __intel_pmu_snapshot_branch_stack(entries, cnt, flags); @@ -2223,7 +2222,6 @@ intel_pmu_snapshot_arch_branch_stack(struct perf_branch_entry *entries, unsigned /* must not have branches... */ local_irq_save(flags); __intel_pmu_disable_all(false); /* we don't care about BTS */ - __intel_pmu_pebs_disable_all(); __intel_pmu_arch_lbr_disable(); /* ... until here */ return __intel_pmu_snapshot_branch_stack(entries, cnt, flags); In the test, this does eliminate the warning. Thanks, Song