Hi Peter,
> On Sep 29, 2021, at 5:26 AM, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
>
> On Wed, Sep 29, 2021 at 08:05:24PM +0800, Like Xu wrote:
>> On 29/9/2021 3:35 pm, Peter Zijlstra wrote:
>
>>>> [ 139.494159] unchecked MSR access error: WRMSR to 0x3f1 (tried to write 0x0000000000000000) at rIP: 0xffffffff81011a8b (intel_pmu_snapshot_branch_stack+0x3b/0xd0)
>>
>> Uh, it uses a PEBS counter to sample or count, which is not yet upstream but
>> should be soon.
>
> Ooh that's PEBS_ENABLE
>
>> Song, can you try to fix bpf_get_branch_snapshot on a normal PMC counter,
>> or where is the src for bpf_get_branch_snapshot? I am more than happy to help.
>
> Nah, all that code wants to do is disable PEBS... and virt being virt,
> it's all sorts of weird with f/m/s :/
>
> I so hate all that. So there's two solutions:
>
> - get confirmation that clearing GLOBAL_CTRL is suffient to supress
> PEBS, in which case we can simply remove the PEBS_ENABLE clear.
How should we confirm this? Can we run some tests for this? Or do we
need hardware experts' input for this?
Thanks,
Song
>
> or
>
> - create another 2 intel_pmu_snapshot_{,arch_}branch_stack() copies
> that omit the PEBS thing.
>
