On Tue, Jan 16, 2024 at 11:07 AM Yonghong Song <yonghong.song@xxxxxxxxx> wrote: > > > On 1/16/24 9:47 AM, Alexei Starovoitov wrote: > > On Mon, Jan 15, 2024 at 8:33 AM Eduard Zingerman <eddyz87@xxxxxxxxx> wrote: > >> > >> [0] Updated LLVM > >> https://github.com/eddyz87/llvm-project/tree/bpf-inline-asm-polymorphic-r > > 1. > > // Use sequence 'wX = wX' if 32-bits ops are available. > > let Predicates = [BPFHasALU32] in { > > > > This is unnecessary conservative. > > wX = wX instructions existed from day one. > > The very first commit of the interpreter and the verifier recognized it. > > No need to gate it by BPFHasALU32. > > Actually this is not true from llvm perspective. > wX = wX is available in bpf ISA from day one, but > wX register is only introduced in llvm in 2017 > and at the same time alu32 is added to facilitate > its usage. Not quite. At that time we added general support in the verifier for the majority of alu32 insns. The insns worked in the interpreter earlier, but the verifier didn't handle them. While wX=wX was supported by the verifier from the start. So this particular single insn shouldn't be part of alu32 flag It didn't need to be back in 2017 and doesn't need to be now.
