> [I have just added a proposal for an agenda item to this week's BPF
> Office Hours so we can discuss about BPF sub-registers and compiler
> constraints, to complement this thread.]
Notes from the office hours:
Availability of 32-bit arithmetic instructions:
(cpu >= v3 AND not disabled with -mno-alu32) OR -malu32
Compiler constraints:
"r"
64-bit register (rN) or 32-bit sub-register (wN), based on the mode of
the operand.
If 32-bit arithmetic available
char, short -> wN and warning
int -> wN
long int -> rN
Else
char, short, int -> rN and warning
long int -> rN
"w"
32-bit sub-register (wN) regardless of the mode of the operand.
If 32-bit arithmetic available
char, short -> wN and warning
int -> wN
long int -> wN and warning
Else
char, short, int, long int -> wN and warning
"R"
64-bit register (rN) regardless of the mode of the operand.
char, short, int -> rN and warn
long int -> rN
Additional constraints for instruction immediates:
"I" imm32
"i" imm64 (already exists as "i" is standard.)
"O" off16
warning if not in range.
