Re: asm register constraint. Was: [PATCH v2 bpf-next 2/5] bpf: Introduce "volatile compare" macro

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On 1/16/24 9:47 AM, Alexei Starovoitov wrote:
On Mon, Jan 15, 2024 at 8:33 AM Eduard Zingerman <eddyz87@xxxxxxxxx> wrote:

[0] Updated LLVM
     https://github.com/eddyz87/llvm-project/tree/bpf-inline-asm-polymorphic-r
1.
// Use sequence 'wX = wX' if 32-bits ops are available.
let Predicates = [BPFHasALU32] in {

This is unnecessary conservative.
wX = wX instructions existed from day one.
The very first commit of the interpreter and the verifier recognized it.
No need to gate it by BPFHasALU32.

Actually this is not true from llvm perspective.
wX = wX is available in bpf ISA from day one, but
wX register is only introduced in llvm in 2017
and at the same time alu32 is added to facilitate
its usage.


2.
case 'w':
if (Size == 32 && HasAlu32)

This is probably unnecessary as well.
When bpf programmer specifies 'w' constraint, llvm should probably use it
regardless of alu32 flag.

aarch64 has this comment:
     case 'x':
     case 'w':
       // For now assume that the person knows what they're
       // doing with the modifier.
       return true;

I'm reading it as the constraint is a final decision.
Inline assembly shouldn't change with -mcpu flags.




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