The check should be moved up into late_init where the call to ecc_available is and we should make it explicit since only vega10 supports it, that way we don't get any false messages from RV. How about the attached patch? Alex ________________________________ From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Junwei Zhang <Jerry.Zhang at amd.com> Sent: Wednesday, January 17, 2018 2:02 AM To: amd-gfx at lists.freedesktop.org Cc: Zhang, Jerry Subject: [PATCH] drm/amdgpu: disable ECC check for Raven to avoid error message annoyance It should be enabled until ECC is supported for Raven. Change-Id: If847663d503c26d2a08274ca721b4ce1bc637111 Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com> --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index c12ee75..a333442 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -533,6 +533,10 @@ static int gmc_v9_0_ecc_available(struct amdgpu_device *adev) DRM_DEBUG("ecc: gmc_v9_0_ecc_available()\n"); + /* Temporally skip ECC for Raven to avoid error message annoyance */ + if (adev->asic_type == CHIP_RAVEN) + return 0; + lost_sheep = 0; for (i = 0; i < ARRAY_SIZE(ecc_umclocalcap_addrs); ++i) { reg_addr = ecc_umclocalcap_addrs[i]; -- 1.9.1 _______________________________________________ amd-gfx mailing list amd-gfx at lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180117/8bda2ad5/attachment-0001.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-drm-amdgpu-only-check-for-ECC-on-Vega10.patch Type: text/x-patch Size: 1360 bytes Desc: 0001-drm-amdgpu-only-check-for-ECC-on-Vega10.patch URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180117/8bda2ad5/attachment-0001.bin>