On Thu, Apr 23, 2009 at 5:04 PM, Daniel Mack <daniel@xxxxxxxx> wrote:> On Thu, Apr 23, 2009 at 04:33:34PM +0800, Eric Miao wrote:>> On Thu, Apr 23, 2009 at 4:17 PM, Mark Brown <broonie@xxxxxxxxxxxxx> wrote:>> > This isn't done for compiler optimisation - it's done because the>> > register bit macros are only defined if PXA3xx support is being built>> > in. I've no problem with removing those guards but without that you'll>> > get build failures on PXA2xx.>> >>>>> Yeah, indeed. This is a rush (so the title is RFC), sorry. I'll get those>> conditional #ifdef .. #endif removed as well in the ssp-regs.h, it>> always makes me upset.>> Well, I put them in there to clearly state which CPUs have support> for this particular feature. Especially for PXAs, where even register> definitions are considered confidential, this might help people fishing> in muddy waters. Some comment would do as well, though.> Yeah, I fully understand that. Actually these are inclusive #ifdef ..which actually doesn't hurt. (Unlike #ifdef .. #else .. #endif). But since the compiler can actually optimize it away, and it's quiteobvious pxa3xx specific by if (cpu_is_pxa3xx()) .. , I'm a bit intendedto remove them away, no?_______________________________________________Alsa-devel mailing listAlsa-devel@xxxxxxxxxxxxxxxxxxxx://mailman.alsa-project.org/mailman/listinfo/alsa-devel
