On Thu, Feb 26, 2009 at 10:59:16AM +0100, pHilipp Zabel wrote: > >> The particular problem with the PXA SSP mode is that I've not yet seen a > >> configuration (neighter in slave nor in master mode) where it sends out > >> 16 bits of left channel information, followed by 16 bits of zeros, then > >> 16 bits of right channel and finally another 16bits of zeros (which > >> exactly what they talk about in the 'i2s via ssp' application note). > >> Has anyone ever got that? > > > > Not to my knowledge. > > I think I've tried to do this by setting network mode with four slots > à 16 bit data width, with a SFRMWDTH of 32 and only the first and > third slot active (SSTSA[TTSA] = 0x5). During the inactive slots, > SSPTXD should be forced low, as long as SSPSP[ETDS] is not set. > It didn't work out, but I'm not sure whether I've set up everything > correctly. This is exactly how I understand the docs as well, so thanks for sharing this :) > My whole understanding of this SSP busineess is rather cloudy. To me too, especially because the documents are faulty. > Is that 'i2s via ssp' application note downloadable somewhere? Only if you signed an NDA with Marvell :-/ Daniel _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
