On Wed, Feb 25, 2009 at 04:22:42PM +0000, Mark Brown wrote: > On Wed, Feb 25, 2009 at 05:06:17PM +0100, Daniel Mack wrote: > > I'm currently fiddling around with these bits in order to find a > > suitable configuration where the codec is master, so this is > > Several people have reported problems in slave mode, unfortunately I've > no hardware which allows me to do tests in slave mode so I'm a bit stuck > there. Is there a thread you can point me to or where have people reported such things? Grep'ing the archives did unveil anything regarding this. > > interesting. As the whole frame in I2S is 64 bits long and one FIFO > > entry has 32 bits of audio data - how can you only deal with one > > timeslot and still playback stereo? > > The I2S frame length depends on the number of bits per sample. Well, as far as I got it, these are different things in the register set. The I2S frame is 64 bits per definition (32 bits for each channel), and this is what the cs4270 requires to use. The particular problem with the PXA SSP mode is that I've not yet seen a configuration (neighter in slave nor in master mode) where it sends out 16 bits of left channel information, followed by 16 bits of zeros, then 16 bits of right channel and finally another 16bits of zeros (which exactly what they talk about in the 'i2s via ssp' application note). Has anyone ever got that? Thanks, Daniel _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
