Rene Herman wrote: > On 22-11-07 11:10, Clemens Ladisch wrote: >> An SPDIF input _always_ derives its clock from its signal. >> >> Besides, the clock for the actual DAC has to be a multiple of the bit >> clock anyway, so there must be a PLL to derive the DAC's clock from the >> input signual, i.e., the amount of DAC clock jitter depends more on the >> PLL implementation than on the input signal quality. > > I don't quite understand your reply. He isn't asking to sync the S/PDIF in > to the signal, he's asking to sync the S/PDIFF _out_ to the S/PDIF in. > > Ie, to have a dummy S/PDIF connection > > DAC --> Card S/PDIF In > > that exists only to supply a clock to the card, to which > > Card S/PDIF Out --> DAC > > will then be synced. This is a valid wish, isn't it? And at least the > M-Audio Audiphile cards can sync themselves to the S/PDIF In clock. They can, but the word clock is used only as a sample clock. It will not reduce the amount of jitter of the card's S/PDIF output. Regards, Clemens ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ Alsa-user mailing list Alsa-user@xxxxxxxxxxxxxxxxxxxxx https://lists.sourceforge.net/lists/listinfo/alsa-user
