On Thu, Oct 08, 2020 at 08:10:12AM -0400, Masayoshi Mizuma wrote:
Hi Jeffrey,
Could you try the following patch?
This patch works for X-Gene and eMAG, but unfortunately it broke the
output on the Altra. The Altra is based on the Neoverse N1 design from
ARM and so it inherited the N1 values in the MIDR register (at least on
the prototype I'm using).
Before your patch:
[root@ampere-altra ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID: Ampere(TM)
Model: 1
Model name: Ampere(TM) Altra(TM) Processor
Stepping: 0x3
After your patch:
[root@ampere-altra ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID: ARM
Model: 1
Model name: Neoverse-N1
Stepping: r3p1
Raw cpuinfo values:
[root@ampere-altra ~]# grep -m5 CPU /proc/cpuinfo
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x3
CPU part : 0xd0c
CPU revision : 1
====================================================================
From: Masayoshi Mizuma <m.mizuma@xxxxxxxxxxxxxx>
Subject: [PATCH] lscpu-arm: Set the order to search the model name
After commit: 367c85c47 ("lscpu: use SMBIOS tables on ARM for lscpu"),
Model name for A64FX shows like as:
Model name: 461F0010
That's because 367c85c47 changes to get the modelname from Processor
Version of SMBIOS.
The SMBIOS info would be great if the system is based on SBBR v1.2E and
BBR v1.0 because the specs require the Processor Version of SMBIOS
as "This field must provide a human readable description of the processor
part number".
However, it's not good for the systems aren't based on the specs,
like A64FX. Such systems need to have the model name to the hard
corded table.
Let's set the order; first, search the hard corded table, then SMBIOS.
Note, some systems, like APM X-Gene, may not match the information
between MIDR register (/proc/cpuinfo) and SMBIOS. To be consistency,
use Processor Manufacturer of SMBIOS when Processor Version is used
even if the hard corded table has the vendor id.
Signed-off-by: Masayoshi Mizuma <m.mizuma@xxxxxxxxxxxxxx>
---
sys-utils/lscpu-arm.c | 30 ++++++++++++++++--------------
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/sys-utils/lscpu-arm.c b/sys-utils/lscpu-arm.c
index 20c7291e5..4e48f6d65 100644
--- a/sys-utils/lscpu-arm.c
+++ b/sys-utils/lscpu-arm.c
@@ -110,7 +110,6 @@ static const struct id_part cavium_part[] = {
};
static const struct id_part apm_part[] = {
- { 0x000, "X-Gene" },
{ -1, "unknown" },
};
@@ -288,6 +287,7 @@ static int __arm_cpu_smbios(struct lscpu_desc *desc)
struct lscpu_dmi_header h;
int fd;
ssize_t rs;
+ int use_smbios = 0;
fd = open(_PATH_SYS_DMI_TYPE4, O_RDONLY);
if (fd < 0)
@@ -301,16 +301,21 @@ static int __arm_cpu_smbios(struct lscpu_desc *desc)
to_dmi_header(&h, data);
- str = dmi_string(&h, data[PROC_MFR_OFFSET]);
- if (str) {
- xstrncpy(buf, str, 127);
- desc->vendor = xstrdup(buf);
+ if (!desc->modelname) {
+ str = dmi_string(&h, data[PROC_VERSION_OFFSET]);
+ if (str) {
+ xstrncpy(buf, str, 127);
+ desc->modelname = xstrdup(buf);
+ use_smbios = 1;
+ }
}
- str = dmi_string(&h, data[PROC_VERSION_OFFSET]);
- if (str) {
- xstrncpy(buf, str, 127);
- desc->modelname = xstrdup(buf);
+ if ((startswith(desc->vendor, "0x")) || use_smbios) {
+ str = dmi_string(&h, data[PROC_MFR_OFFSET]);
+ if (str) {
+ xstrncpy(buf, str, 127);
+ desc->vendor = xstrdup(buf);
+ }
}
return 0;
@@ -318,14 +323,11 @@ static int __arm_cpu_smbios(struct lscpu_desc *desc)
void arm_cpu_decode(struct lscpu_desc *desc, struct lscpu_modifier *mod)
{
- int rc = -1;
+ __arm_cpu_decode(desc);
/* use SMBIOS Type 4 data if available,
* else fall back to manual decoding using the tables above */
if (mod->system == SYSTEM_LIVE &&
access(_PATH_SYS_DMI_TYPE4, R_OK) == 0)
- rc = __arm_cpu_smbios(desc);
-
- if (rc)
- __arm_cpu_decode(desc);
+ __arm_cpu_smbios(desc);
}
--
2.27.0
Thanks,
Masa
--
Jeff Bastian
Kernel QE - Hardware Enablement
Red Hat
