Re: [RFC] lscpu - CPU architecture information helper

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Cai Qian, le Fri 04 Jul 2008 11:23:10 +0800, a écrit :
> $ /usr/bin/lscpu
> Processor(s):    2

I would avoid the generic term "Processor(s)" and use "Socket(s)" instead.

> CPU core(s):     2

There should be a CPU thread(s) lines here, as SMT is not always only
two-way (see Sun's Niagara).

> CPU(s):          8
> Vendor ID:       GenuineIntel
> CPU family:      Itanium 2
> Model:           0
> CPU MHz:         1598.000005
> L1d cache:       16K
> L1i cache:       16K
> L2d cache:       256K
> L2i cache:       1024K
> L3 cache:        12288K
> SMT:             Yes

This is then redundant with the field I proposed above.

> NUMA node(s):    1

Mmm, for coherency, I would rather put that at the top, and divide the
number of sockets by the number of nodes, to show the number of sockets
per node.

> #CPU,Core,Socket,L1d,L1i,L2d,L2i,L3
> 1,3,15,3,3,3,15,15
> 2,3,15,3,3,3,15,15
> 4,12,15,12,12,12,15,15
> 8,12,15,12,12,12,15,15
> 16,48,240,48,48,48,240,240
> 32,48,240,48,48,48,240,240
> 64,192,240,192,192,192,240,240
> 128,192,240,192,192,192,240,240

This is just a shuffling of the /sys information, and thus not much more
readable...  At least use hex!

Else, I would suggest to give numbers to caches: give CPU0's caches
number 0 and then CPU2's new caches number 1, etc.  I.e.

0,0,0,0,0,0,0,0
1,0,0,0,0,0,0,0
2,1,0,1,1,1,0,0
3,1,0,1,1,1,0,0
4,2,1,2,2,2,1,1
5,2,1,2,2,2,1,1
6,3,1,3,3,3,1,1
7,3,1,3,3,3,1,1

>  _______________________________________________________________
> |      |       |            |     |     |      |       |        |
> | cpu0 |       |            |     |     |      |       |        |
> |______| core0 |            | L1d | L1i | L2d  |       |        |
> |      |       |            | 16K | 16K | 256K |       |        |
> | cpu1 |       |            |     |     |      |       |        |
> |______|_______| processor0 |_____|_____|______| L2i   | L3     |
> |      |       |            |     |     |      | 1024K | 12288K |
> | cpu2 |       |            |     |     |      |       |        |
> |______| core1 |            | L1d | L1i | L2d  |       |        |
> |      |       |            | 16K | 16K | 256K |       |        |
> | cpu3 |       |            |     |     |      |       |        |
> |______|_______|____________|_____|_____|______|_______|________|
> |      |       |            |     |     |      |       |        |
> | cpu4 |       |            |     |     |      |       |        |
> |______| core2 |            | L1d | L1i | L2d  |       |        |
> |      |       |            | 16K | 16K | 256K |       |        |
> | cpu5 |       |            |     |     |      |       |        |
> |______|_______| processor1 |_____|_____|______| L2i   | L3     |                    
> |      |       |            |     |     |      | 1024K | 12288K |
> | cpu6 |       |            |     |     |      |       |        |
> |______| core3 |            | L1d | L1i | L2d  |       |        |
> |      |       |            | 16K | 16K | 256K |       |        |
> | cpu7 |       |            |     |     |      |       |        |
> |______|_______|____________|_____|_____|______|_______|________|

That would be an even more readable form, and I think it wouldn't be
difficult to generate, except that you'll need to use some topology
sorting (cpu numbers are not always in local order...)

Samuel
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