Hi Ahmad,
On 12/20/2024 2:12 PM, Ahmad Fatoum wrote:
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Hello Ye Li,
On 20.12.24 02:58, Ye Li wrote:
On 12/19/2024 6:27 PM, Ahmad Fatoum wrote:
On 30.09.24 08:38, Peng Fan wrote:
I now have the DDR settings for an i.MX9 LPDDR4 board in front of me
that has different contents for struct
dram_cfg_param::ddrphy_trained_csr than the default.
I will inquire how that came about, but in parallel I wanted to ask you if
this is supposed to happen and to alert you to this issue.
Thanks for raising this issue. I think board specific csr should be used.
I will check with DDR TOOL owners on this.
Did you hear back in the meantime?
We have discussed this internally. The DDR tool may generate different board specific csr. Currently in DDR retention, because we load csr + ddr_phy_pie, so it is safe to use this global csr.
So ddr_phy_pie contains the firmware to the DDR PHY µC and it will
train the PHY and thus will iron over any missing entries in the
stored CSR? Is my understanding correct?
PIE is not used for training and does not contain firmware. It sequences
PHY initialization like pll lock, power gating, etc.
Normally its configuration registers should be saved as a part of
ddrphy_trained_csr list. Our DDR expert thinks the major missing in the
global CSR is the PIE configuration registers.
Best regards,
Ye Li
But we agree this global csr is confused and waste some memory. It is better to switch to the board csr.
Thanks for the confirmation.
Cheers,
Ahmad
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