On 16.02.24 14:15, Sascha Hauer wrote:
> On Thu, Feb 15, 2024 at 05:30:09PM +0100, Ahmad Fatoum wrote:
>> barebox, like Linux, will consider disabling parents when disabling a
>> child clock. In the AT91 OHCI driver ported to barebox from Linux, this
>> leads to the USB clock shutdown during device shutdown to propagate up
>> to PLLB, which is also disabled.
>>
>> On probe of the kernel driver, the USB clock rate is set to 48MHz, which
>> propagates up to the PLL, which is powered on again. In barebox, this clock
>> rate propagation does not happen and the PLL is only initially
>> configured in the first stage bootloader.
>>
>> This has the effect that chainloading barebox from within barebox will
>> hang as the first barebox disables PLLB on shutdown and the second
>> barebox never power it on.
>>
>> The proper solution would be to support propagation of clock rate change
>> requests, but till we have that, patch the driver, so only the immediate
>> clock is disabled and not its parents.
>>
>> Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
>> ---
>> v3:
>> - new patch
>> ---
>> drivers/clk/clk.c | 12 +++++++++---
>> drivers/usb/host/ohci-at91.c | 13 +++++++++++--
>> include/linux/clk.h | 20 ++++++++++++++++++--
>> 3 files changed, 38 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>> index d3f5d5e83880..03533b61df0a 100644
>> --- a/drivers/clk/clk.c
>> +++ b/drivers/clk/clk.c
>> @@ -66,7 +66,7 @@ int clk_enable(struct clk *clk)
>> return 0;
>> }
>>
>> -void clk_disable(struct clk *clk)
>> +void clk_disable_one(struct clk *clk)
>> {
>
> I don't like this very much as it screws up the enable counter of the
> clocks.
>
> Cou could mark the PLL clock as critical or simply not disable the clock
> in the driver.
Ok, I will think about it. I will drop this from v2.
Thanks,
Ahmad
>
> Sascha
>
>
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