ddrphy_init_set_dfi_clk() is called to translate a scalar clock rate
as specified by board code into PLL parameters, which are configured.
enum ddr_rate describes the possible DDR rates and so far
ddrphy_init_set_dfi_clk() supported all of them, except for 2600 and
2376 MHz, rendering these two rates unusable.
Fix this by adding support for them into ddrphy_init_set_dfi_clk.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
drivers/ddr/imx/imx8m_ddr_init.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/imx/imx8m_ddr_init.c b/drivers/ddr/imx/imx8m_ddr_init.c
index 8b829645c063..d9a5d589f27b 100644
--- a/drivers/ddr/imx/imx8m_ddr_init.c
+++ b/drivers/ddr/imx/imx8m_ddr_init.c
@@ -219,9 +219,9 @@ enum ddr_rate {
DDR_3720,
DDR_3200,
DDR_3000,
- DDR_2600, /* Unused */
+ DDR_2600,
DDR_2400,
- DDR_2376, /* Unused */
+ DDR_2376,
DDR_1600,
DDR_1000, /* Unused */
DDR_1066,
@@ -450,7 +450,9 @@ static void ddrphy_init_set_dfi_clk(struct dram_controller *dram, unsigned int d
case 3720: drate = DDR_3720; break;
case 3200: drate = DDR_3200; break;
case 3000: drate = DDR_3000; break;
+ case 2600: drate = DDR_2600; break;
case 2400: drate = DDR_2400; break;
+ case 2376: drate = DDR_2376; break;
case 1600: drate = DDR_1600; break;
case 1066: drate = DDR_1066; break;
case 667: drate = DDR_667; break;
--
2.39.2
