Change the logic to be different depending on whether we are doing
synchronization for a cpu or a device. This gets rid of unnecessary
cache flushing in some cases. While at it, also simplify code a bit,
collapsing two cases with the same code in a switch statement in
dma_sync_single_for_device().
The functional change itself is taken from Linux commit
'MIPS: make dma_sync_*_for_cpu a little less overzealous'
(hash: cbf1449ba5aec9cf4c68b69f899391a8d42e9b8f).
Signed-off-by: Denis Orlov <denorl2009@xxxxxxxxx>
---
arch/mips/lib/dma-default.c | 36 +++++++++++++++++-------------------
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/arch/mips/lib/dma-default.c b/arch/mips/lib/dma-default.c
index f6c750b8ac..0347d7a7db 100644
--- a/arch/mips/lib/dma-default.c
+++ b/arch/mips/lib/dma-default.c
@@ -6,39 +6,37 @@
#include <dma.h>
#include <asm/io.h>
-static inline void __dma_sync_mips(unsigned long addr, size_t size,
- enum dma_data_direction direction)
+void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+ enum dma_data_direction dir)
{
- switch (direction) {
+ unsigned long virt = (unsigned long)phys_to_virt(address);
+
+ switch (dir) {
case DMA_TO_DEVICE:
- dma_flush_range(addr, addr + size);
break;
-
case DMA_FROM_DEVICE:
- dma_inv_range(addr, addr + size);
- break;
-
case DMA_BIDIRECTIONAL:
- dma_flush_range(addr, addr + size);
+ dma_inv_range(virt, virt + size);
break;
-
default:
BUG();
}
}
-void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
- enum dma_data_direction dir)
-{
- unsigned long virt = (unsigned long)phys_to_virt(address);
-
- __dma_sync_mips(virt, size, dir);
-}
-
void dma_sync_single_for_device(dma_addr_t address, size_t size,
enum dma_data_direction dir)
{
unsigned long virt = (unsigned long)phys_to_virt(address);
- __dma_sync_mips(virt, size, dir);
+ switch (dir) {
+ case DMA_FROM_DEVICE:
+ dma_inv_range(virt, virt + size);
+ break;
+ case DMA_TO_DEVICE:
+ case DMA_BIDIRECTIONAL:
+ dma_flush_range(virt, virt + size);
+ break;
+ default:
+ BUG();
+ }
}
--
2.30.2
