Multi-image build with i.MX8MN-EVK increases size for other board, because DDR4 firmware will be included for LPDDR4 only PBLs too. We should fix that with LTO, but until that's done, we can reduce size a good bit by compressing DTBs. This saves e.g. 27K for the i.MX8M-EVK (8MQuad). Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> --- arch/arm/boards/mnt-reform/lowlevel.c | 4 ++-- arch/arm/boards/nxp-imx8mm-evk/lowlevel.c | 4 ++-- arch/arm/boards/nxp-imx8mp-evk/lowlevel.c | 4 ++-- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 4 ++-- arch/arm/boards/phytec-som-imx8mq/lowlevel.c | 4 ++-- arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/boards/mnt-reform/lowlevel.c b/arch/arm/boards/mnt-reform/lowlevel.c index 268dfb611aa8..231c92daf5c7 100644 --- a/arch/arm/boards/mnt-reform/lowlevel.c +++ b/arch/arm/boards/mnt-reform/lowlevel.c @@ -18,7 +18,7 @@ #include <mach/xload.h> #include <soc/imx8m/ddr.h> -extern char __dtb_imx8mq_mnt_reform2_start[]; +extern char __dtb_z_imx8mq_mnt_reform2_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(MX8MQ_PAD_CTL_DSE_65R) @@ -173,7 +173,7 @@ static __noreturn noinline void mnt_reform_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mq_barebox_entry(__dtb_imx8mq_mnt_reform2_start); + imx8mq_barebox_entry(__dtb_z_imx8mq_mnt_reform2_start); } ENTRY_FUNCTION(start_mnt_reform, r0, r1, r2) diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c index c2f6206cfd8e..7a1a60d903a7 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c @@ -23,7 +23,7 @@ #include <soc/fsl/fsl_udc.h> #include <image-metadata.h> -extern char __dtb_imx8mm_evk_start[]; +extern char __dtb_z_imx8mm_evk_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -168,7 +168,7 @@ static __noreturn noinline void nxp_imx8mm_evk_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mm_barebox_entry(__dtb_imx8mm_evk_start); + imx8mm_barebox_entry(__dtb_z_imx8mm_evk_start); } ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) diff --git a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c index c7916e496264..ab01c140b5dd 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c @@ -23,7 +23,7 @@ #include <soc/imx8m/ddr.h> #include <soc/fsl/fsl_udc.h> -extern char __dtb_imx8mp_evk_start[]; +extern char __dtb_z_imx8mp_evk_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ MX8MP_PAD_CTL_FSEL) @@ -175,7 +175,7 @@ static __noreturn noinline void nxp_imx8mp_evk_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mp_barebox_entry(__dtb_imx8mp_evk_start); + imx8mp_barebox_entry(__dtb_z_imx8mp_evk_start); } ENTRY_FUNCTION(start_nxp_imx8mp_evk, r0, r1, r2) diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index 92cc22e022e3..0c9f6345ff30 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -21,7 +21,7 @@ #include "ddr.h" -extern char __dtb_imx8mq_evk_start[]; +extern char __dtb_z_imx8mq_evk_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -97,7 +97,7 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mq_barebox_entry(__dtb_imx8mq_evk_start); + imx8mq_barebox_entry(__dtb_z_imx8mq_evk_start); } ENTRY_FUNCTION(start_nxp_imx8mq_evk, r0, r1, r2) diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c index 05226866f828..d35f9b0d39ae 100644 --- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c @@ -23,7 +23,7 @@ #include "ddr.h" -extern char __dtb_imx8mq_phytec_phycore_som_start[]; +extern char __dtb_z_imx8mq_phytec_phycore_som_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -90,7 +90,7 @@ static __noreturn noinline void phytec_phycore_imx8mq_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mq_barebox_entry(__dtb_imx8mq_phytec_phycore_som_start); + imx8mq_barebox_entry(__dtb_z_imx8mq_phytec_phycore_som_start); } /* diff --git a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c index 24d98fe6c993..848e90dbc1b6 100644 --- a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c +++ b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c @@ -15,7 +15,7 @@ #include <soc/fsl/fsl_udc.h> #include <soc/imx8m/ddr.h> -extern char __dtb_imx8mm_prt8mm_start[]; +extern char __dtb_z_imx8mm_prt8mm_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -109,7 +109,7 @@ static __noreturn noinline void prt_prt8mm_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mm_barebox_entry(__dtb_imx8mm_prt8mm_start); + imx8mm_barebox_entry(__dtb_z_imx8mm_prt8mm_start); } ENTRY_FUNCTION(start_prt_prt8mm, r0, r1, r2) -- 2.30.2
