Hello Antony,
On 16.06.22 09:53, Antony Pavlov wrote:
> Hi!
>
> In 0e885ce81d0e ('RISC-V: dma: support multiple dma_alloc_coherent backends') ,
> (see https://lore.barebox.org/barebox/20210619045055.779-10-a.fatoum@xxxxxxxxxxxxxx/)
> multiple dma_alloc_coherent backends was introduced for RISC-V.
>
> At the moment MIPS dma_alloc_coherent stuff is messy and I want to rework it.
> I can reuse some parts of 0e885ce81d0e by moving it to the common code.
> Any comments or suggestions?
I have been meaning to clean this dma API stuff up, so I find it very nice
that you are going to do it :)
Currently, we have two ways to influence this:
- dma_set_ops
- define static inline helpers in <asm/dma.h> and #define macros, so the generic
implementation isn't used
(see https://lore.barebox.org/barebox/20220614091556.1018102-1-a.fatoum@xxxxxxxxxxxxxx/T/#t)
As first step, one could clean up the repetition in the <asm/dma.h> files, e.g.
dma_alloc_coherent is nearly identical in a couple of places. Then as next step
we could have (just example names)
CONFIG_DMA_UNCACHED
The current !PBL and/or !MMU case
CONFIG_DMA_PER_ARCH
For those not using dma_set_ops
CONFIG_DMA_DYNAMIC_OPS
For those using dma_set_ops
This should allows us to get rid of the macros and then each arch could just
select the appropriate symbol.
What do you think?
Cheers,
Ahmad
>
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