Hi!
In 0e885ce81d0e ('RISC-V: dma: support multiple dma_alloc_coherent backends') ,
(see https://lore.barebox.org/barebox/20210619045055.779-10-a.fatoum@xxxxxxxxxxxxxx/)
multiple dma_alloc_coherent backends was introduced for RISC-V.
At the moment MIPS dma_alloc_coherent stuff is messy and I want to rework it.
I can reuse some parts of 0e885ce81d0e by moving it to the common code.
Any comments or suggestions?
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Best regards,
Antony Pavlov
