[PATCH v2 02/21] dma: add dma_sync nop stubs for PBL

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We can implement dma_sync functions as compiler barriers when we are
certain that the buffers are in coherent/uncached memory, e.g. because
MMU is only enabled in barebox_arm_entry which hasn't run yet.

This will come in handy when doing mailbox communication in PBL on the
Raspberry Pi.

Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
 include/dma.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/dma.h b/include/dma.h
index 90f9254ea80f..aeaba7d9316d 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -8,6 +8,7 @@
 
 #include <malloc.h>
 #include <xfuncs.h>
+#include <pbl.h>
 #include <linux/kernel.h>
 
 #include <dma-dir.h>
@@ -56,12 +57,30 @@ static inline int dma_mapping_error(struct device_d *dev, dma_addr_t dma_addr)
 		(dev->dma_mask && dma_addr > dev->dma_mask);
 }
 
+#ifndef __PBL__
 /* streaming DMA - implement the below calls to support HAS_DMA */
 void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
 			     enum dma_data_direction dir);
 
 void dma_sync_single_for_device(dma_addr_t address, size_t size,
 				enum dma_data_direction dir);
+#else
+/*
+ * assumes buffers are in coherent/uncached memory, e.g. because
+ * MMU is only enabled in barebox_arm_entry which hasn't run yet.
+ */
+static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+			     enum dma_data_direction dir)
+{
+	barrier_data((void *)address);
+}
+
+static inline void dma_sync_single_for_device(dma_addr_t address, size_t size,
+				enum dma_data_direction dir)
+{
+	barrier_data((void *)address);
+}
+#endif
 
 void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle);
 void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size);
-- 
2.30.2


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