On 2021-09-19 09:06, Rouven Czerwinski wrote: > Hi Peter, > > while this may break for your board, it fundamentally introduces the > possibility to speculate out of the RAM area on speculation happy I'm aware of that. For me, speculation is not an issue since *any* rogue code running on the embedded device in question is a major fail. Also, from the cover letter: "I'm going to follow up with patches. I very much realize that these patches are most likely not acceptable as-is, but I do include them since they are probably the best description of where the problems are." > processors. Are you calling into SAMA5D3 ROM code somewhere? If so an *I* am not calling anything. Maybe the board code for sama5d3xek is, but I have no idea as it's not "my" code. How can I figure out if it does? Cheers, Peter > exception can be added similar to the handling for the HAB code > (arch/arm/cpu/mmu_early.c): > > if (IS_ENABLED(CONFIG_HABV4) && IS_ENABLED(CONFIG_ARCH_IMX6)) > map_region(0x0, SZ_1M, PMD_SECT_DEF_CACHED); > > which allows calls into the NXP boot ROM to retrieve the HAB status. _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox