The "Running on DE0-Nano FPGA board" is a "Erizo" subsection not independent section. Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx> --- Documentation/boards/riscv.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/boards/riscv.rst b/Documentation/boards/riscv.rst index 59cdc00a99..387b86c588 100644 --- a/Documentation/boards/riscv.rst +++ b/Documentation/boards/riscv.rst @@ -122,7 +122,7 @@ Run barebox:: Running on DE0-Nano FPGA board ------------------------------- +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ See https://github.com/open-design/riscv-soc-cores/ for instructions on DE0-Nano bitstream generation and loading. -- 2.32.0.rc0 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
