[PATCH] fixup! pinctrl: Rockchip: Update from Linux

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The original code uses regmap for the base address and reg for the
offset to add onto it. The barebox port combines both into one pointer
named reg. In rockchip_pinctrl_set_func(), two different offsets are
used with the same base address. The code erroneously uses
reg (base + offset) in place of base, leading to memory writes into
the wrong registers. Fix this.

Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
 drivers/pinctrl/pinctrl-rockchip.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c3d89938943c..df702fbb6164 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -715,19 +715,19 @@ static int rockchip_pinctrl_set_func(struct rockchip_pin_bank *bank, int pin,
 				     int mux)
 {
 	struct rockchip_pinctrl *info = bank->drvdata;
-	void __iomem *reg;
+	void __iomem *base, *reg;
 	u8 bit;
 	u32 data, route_location, route_reg, route_val;
 	int iomux_num = (pin / 8);
 	int mux_type;
 	int mask;
 
-	reg = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+	base = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? info->reg_pmu : info->reg_base;
 
 	/* get basic quadrupel of mux registers and the correct reg inside */
 	mux_type = bank->iomux[iomux_num].type;
-	reg += bank->iomux[iomux_num].offset;
+	reg = base + bank->iomux[iomux_num].offset;
 
 	dev_dbg(info->pctl_dev.dev, "setting func of GPIO%d-%d to %d\n",
 		 bank->bank_num, pin, mux);
@@ -750,7 +750,7 @@ static int rockchip_pinctrl_set_func(struct rockchip_pin_bank *bank, int pin,
 	if (bank->route_mask & BIT(pin)) {
 		if (rockchip_get_mux_route(bank, pin, mux, &route_location,
 					   &route_reg, &route_val)) {
-			void __iomem  *route = reg;
+			void __iomem  *route = base;
 
 			/* handle special locations */
 			switch (route_location) {
-- 
2.29.2


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