On Wed, Jan 20, 2021 at 01:51:07PM +0100, Andrej Picej wrote:
> During raw NAND booting, GPMI/BCH clock generation might fail due to
> improper clock gating conditions and consequently booting from NAND will
> fail. This is caused by silicon errata ERR007117. Apply errata fix
> workaround before GPMI NAND xload to prevent this from occurring.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@xxxxxxxxx>
> Signed-off-by: Andrej Picej <andrej.picej@xxxxxxxxx>
> ---
> arch/arm/mach-imx/xload-gpmi-nand.c | 62 +++++++++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm/mach-imx/xload-gpmi-nand.c b/arch/arm/mach-imx/xload-gpmi-nand.c
> index 04f799604..4be6d1890 100644
> --- a/arch/arm/mach-imx/xload-gpmi-nand.c
> +++ b/arch/arm/mach-imx/xload-gpmi-nand.c
> @@ -20,6 +20,8 @@
> #include <mach/xload.h>
> #include <mach/imx-nand-bcb.h>
> #include <linux/mtd/rawnand.h>
> +#include <mach/imx6-regs.h>
> +#include <mach/clock-imx6.h>
>
> /*
> * MXS DMA hardware command.
> @@ -256,6 +258,63 @@ struct mxs_nand_info {
> unsigned long nand_size;
> };
>
> +/**
> + * It was discovered that xloading barebox from NAND sometimes fails. Observed
> + * behaviour is similar to silicon errata ERR007117 for i.MX6.
Have you really seen this behaviour? I wonder because the ROM has
already loaded the initial code that is just running from NAND, so it
surprises me that we still have to apply clock fixes.
Sascha
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