On Fri, May 08, 2020 at 08:41:41AM +0200, Ahmad Fatoum wrote: > Hello, > > On 4/27/20 10:28 AM, Ahmad Fatoum wrote: > > Hello, > > > > On 4/27/20 10:07 AM, Sascha Hauer wrote: > >> On Mon, Apr 27, 2020 at 09:13:49AM +0200, Ahmad Fatoum wrote: > >>> `mw 0x20d8040 0x08000030; mw 0x20d8044 0x10000000; reset` issued on an > >>> i.MX6Q forces boot from the ecspi1. This is because the BootROM reads > >>> the boot mode out of SRC_GPR9 instead of SRC_SBMR1 whenever SRC_GPR10 > >>> has its 28th bit set. > >> > >> Is this documented somewhere? The reference Manual marks SRC_GPR9 and > >> SRC_GPR10 as > >> > >> | This register is used by the ROM code and should not be used > >> | by application software. > > Seems it's indeed documented in the IMX6ULRM (Rev.2 03/27). > See Table 8-6. Persistent bits. > > Can the patches be applied or do you need me to change something? I just merged them Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
