[PATCH 06/13] clk imx28: Add USB clocks

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The USB clocks are missing, add them to make USB work as part of the
i.MX chipidea driver.

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 drivers/clk/mxs/clk-imx28.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 241b26c9a2..aa528e109a 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -11,6 +11,7 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 #include <mach/imx28-regs.h>
+#include <of_address.h>
 
 #include "clk.h"
 
@@ -38,6 +39,9 @@
 #define FRAC1			(regs + 0x01c0)
 #define CLKSEQ			(regs + 0x01d0)
 
+static void __iomem *digctrl;
+#define DIGCTRL digctrl
+
 static const char *sel_cpu[]  = { "ref_cpu", "ref_xtal", };
 static const char *sel_io0[]  = { "ref_io0", "ref_xtal", };
 static const char *sel_io1[]  = { "ref_io1", "ref_xtal", };
@@ -64,6 +68,8 @@ static struct clk *clks[clk_max];
 
 static int __init mx28_clocks_init(void __iomem *regs)
 {
+	struct device_node *dcnp;
+
 	clks[ref_xtal] = clk_fixed("ref_xtal", 24000000);
 	clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000);
 	clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000);
@@ -120,6 +126,13 @@ static int __init mx28_clocks_init(void __iomem *regs)
 	clks[lcdif_comp] = mxs_clk_lcdif("lcdif_comp", clks[ref_pix],
 			clks[lcdif_div], clks[lcdif]);
 
+	dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
+	if (dcnp) {
+		digctrl = of_iomap(dcnp, 0);
+		clks[usb0] = mxs_clk_gate("usb0", "usb0_phy", DIGCTRL, 2);
+		clks[usb1] = mxs_clk_gate("usb1", "usb1_phy", DIGCTRL, 16);
+	}
+
 	clk_set_rate(clks[ref_io0], 480000000);
 	clk_set_rate(clks[ref_io1], 480000000);
 	clk_set_parent(clks[ssp0_sel], clks[ref_io0]);
-- 
2.26.2


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