System reset wasn't supported on the sama5 so far.
Add a driver to remedy this.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
arch/arm/mach-at91/Kconfig | 5 +++
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/at91sam9_rst.c | 74 +++++++++++++++++++++++++++++++
3 files changed, 80 insertions(+)
create mode 100644 arch/arm/mach-at91/at91sam9_rst.c
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5267102bf94e..0eb5410664bb 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -41,12 +41,16 @@ config AT91SAM926X_BOARD_INIT
config AT91SAM9_SMC
bool
+config HAVE_AT91SAM9_RST
+ bool
+
config SOC_AT91SAM9
bool
select CPU_ARM926T
select AT91SAM9_SMC
select CLOCKSOURCE_ATMEL_PIT
select PINCTRL
+ select HAVE_AT91SAM9_RST
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
select HAVE_AT91_UTMI
@@ -54,6 +58,7 @@ config SOC_AT91SAM9
config SOC_SAMA5
bool
+ select HAVE_AT91SAM9_RST
select CPU_V7
config SOC_SAMA5D2
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 66d0b700f61e..89aff54b8af7 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -13,6 +13,7 @@ obj-y += at91sam9_reset.o
obj-y += at91sam9g45_reset.o
obj-$(CONFIG_AT91SAM9_SMC) += sam9_smc.o
+obj-$(CONFIG_HAVE_AT91SAM9_RST) += at91sam9_rst.o
# CPU-specific support
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
diff --git a/arch/arm/mach-at91/at91sam9_rst.c b/arch/arm/mach-at91/at91sam9_rst.c
new file mode 100644
index 000000000000..cd266052c98d
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9_rst.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Pengutronix, Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <restart.h>
+#include <linux/clk.h>
+#include <mach/at91_rstc.h>
+
+struct at91sam9x_rst {
+ struct restart_handler restart;
+ void __iomem *base;
+};
+
+static void __noreturn at91sam9x_restart_soc(struct restart_handler *rst)
+{
+ struct at91sam9x_rst *priv = container_of(rst, struct at91sam9x_rst, restart);
+
+ writel(AT91_RSTC_PROCRST
+ | AT91_RSTC_PERRST
+ | AT91_RSTC_EXTRST
+ | AT91_RSTC_KEY,
+ priv->base + AT91_RSTC_CR);
+
+ hang();
+}
+
+static int at91sam9x_rst_probe(struct device_d *dev)
+{
+ struct at91sam9x_rst *priv;
+ struct resource *iores;
+ struct clk *clk;
+
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores)) {
+ dev_err(dev, "could not get reset memory region\n");
+ return PTR_ERR(iores);
+ }
+
+ priv = xzalloc(sizeof(*priv));
+ priv->base = IOMEM(iores->start);
+
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk)) {
+ release_region(iores);
+ free(priv);
+ return PTR_ERR(clk);
+ }
+
+ clk_enable(clk);
+
+ priv->restart.name = "at91sam9x_rst";
+ priv->restart.restart = at91sam9x_restart_soc;
+
+ restart_handler_register(&priv->restart);
+
+ return 0;
+}
+
+static const __maybe_unused struct of_device_id at91sam9x_rst_dt_ids[] = {
+ { .compatible = "atmel,at91sam9g45-rstc", },
+ { .compatible = "atmel,sama5d3-rstc", },
+ { /* sentinel */ },
+};
+
+static struct driver_d at91sam9x_rst_driver = {
+ .name = "at91sam9x-rst",
+ .of_compatible = DRV_OF_COMPAT(at91sam9x_rst_dt_ids),
+ .probe = at91sam9x_rst_probe,
+};
+device_platform_driver(at91sam9x_rst_driver);
--
2.25.1
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