s series has some updates to the Designware PCIe controller driver taken from Linux and finally adds support for the Layerscape incarnation of the Designware PCIe core. Sascha Hauer (12): PCI: dwc: Don't hard-code DBI/ATU offset PCI: dwc: Make use of IS_ALIGNED() PCI: dwc: Add dw_pcie_disable_atu() PCI: dwc: Make use of BIT() in constant definitions PCI: dwc: Enable iATU unroll for endpoint too PCI: dwc: Fix ATU identification for designware version >= 4.80 PCI: dwc: imx6: Share PHY debug register definitions PCI: dwc: Cleanup DBI,ATU read and write APIs PCI: dwc: rename readl/writel_dbi ops to read/write_dbi PCI: dwc: Sync register definitions with Linux-5.4 PCI: dwc: Return directly when num-lanes is not found PCI: Add layerscape PCIe driver arch/arm/Kconfig | 1 + drivers/pci/Kconfig | 7 + drivers/pci/Makefile | 1 + drivers/pci/pci-imx6.c | 11 +- drivers/pci/pci-layerscape.c | 484 +++++++++++++++++++++++++++++ drivers/pci/pcie-designware-host.c | 16 - drivers/pci/pcie-designware.c | 108 +++++-- drivers/pci/pcie-designware.h | 152 ++++++--- 8 files changed, 688 insertions(+), 92 deletions(-) create mode 100644 drivers/pci/pci-layerscape.c -- 2.24.0 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
