Am 19.11.19 um 09:26 schrieb Ahmad Fatoum:
> Hello Sascha,
>
> On 8/19/19 3:38 PM, Sascha Hauer wrote:
>> +void dt_2nd_aarch64(void *fdt)
>> +{
>> + unsigned long image_start = (unsigned long)_text + global_variable_offset();
>> +
>> + arm_setup_stack(image_start);
>
> Shouldn't we rather place the stack somewhere beyond the end of the barebox image
> instead of assuming that we can access the memory before the start?
>
> I am asking because I am testing use of the generic ARM board as default
> second stage image for the multi-image AT91s. The board specific entry point
> generates only the PBL, which runs in SRAM to do DRAM setup and chainloads
> the generic dt barebox from MMC to start of SDRAM and then calls it along
> with the dtb.
Hm.. Is it possible that you can get an exception vector in the star of SDRAM?
> It works so far and I like that I now can have the same second stage barebox
> for all multi-image targets. (And one could even "falcon"-boot that way).
> What do you think?>
>> +ENTRY_FUNCTION(start_dt_2nd, r0, r1, r2)
>> +{
>> + unsigned long image_start = (unsigned long)_text + global_variable_offset();
>> +
>> + arm_setup_stack(image_start);
>
>
> Ditto.
>
> Cheers
> Ahmad
>
--
Regards,
Oleksij
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