[PATCH 11/18] ARM: zynq: fixup SLCR ranges

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Linux uses some kind of MFD scheme for the devices in the SLCR register
range, which involves adding the parent register base address to the
register offset of the child devices, as described in DT. This needs
non-standard code in each of those child device drivers.

Instead of replicating this weird driver code, fix up the SLCR parent
device DT ranges to do the translation.

Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
---
 arch/arm/dts/zynq-7000.dtsi | 4 ++++
 arch/arm/dts/zynq-zed.dts   | 1 +
 2 files changed, 5 insertions(+)
 create mode 100644 arch/arm/dts/zynq-7000.dtsi

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
new file mode 100644
index 000000000000..a4555a7a1b6c
--- /dev/null
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -0,0 +1,4 @@
+
+&slcr {
+	ranges = <0x0 0xf8000000 0x1000>;
+};
diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts
index 52d68332499a..9839d810b616 100644
--- a/arch/arm/dts/zynq-zed.dts
+++ b/arch/arm/dts/zynq-zed.dts
@@ -1,4 +1,5 @@
 #include <arm/zynq-zed.dts>
+#include "zynq-7000.dtsi"
 
 / {
 	chosen {
-- 
2.23.0


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