Fix setup of the SDRAM's MR0 register: 'val' gets overwritten by the chip select decision and nothing is written to the MR0 register. This fix is required since some i.MX53 based platforms still use this software setup routine to configure their SDRAMs. Signed-off-by: Juergen Borleis <jbe@xxxxxxxxxxxxxx> --- arch/arm/mach-imx/esdctl-v4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/esdctl-v4.c b/arch/arm/mach-imx/esdctl-v4.c index 0652b492e..6de4a8d6e 100644 --- a/arch/arm/mach-imx/esdctl-v4.c +++ b/arch/arm/mach-imx/esdctl-v4.c @@ -191,9 +191,9 @@ void imx_esdctlv4_start_ddr3_sdram(int cs) ESDCTL_V4_DDR3_REG_MR0 | val_cs1; if (cs) - val = ESDCTL_V4_ESDSCR_DLL_RST1; + val |= ESDCTL_V4_ESDSCR_DLL_RST1; else - val = ESDCTL_V4_ESDSCR_DLL_RST0; + val |= ESDCTL_V4_ESDSCR_DLL_RST0; writel(val, base + ESDCTL_V4_ESDSCR); -- 2.16.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
