On Tue, Jun 20, 2017 at 08:41:59PM -0700, Andrey Smirnov wrote:
> On Tue, Jun 20, 2017 at 12:35 AM, Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:
> > On Mon, Jun 19, 2017 at 07:40:36AM -0700, Andrey Smirnov wrote:
> >> Everyone,
> >>
> >> It looks like my test setup was somehow contaminated -- possibly by
> >> using JTAG to initalize SoC and upload Barebox binary -- so
> >> 21921f7f419dfaabcd385595ada24f0352310f1a ("i.MX: vf610: Ramp CPU clock
> >> to maximum frequency") didn't actually work as I thought it was and
> >> instead it made Barebox not boot on Vybrid.
> >>
> >> This patch series contains all of the changes I had to make in order
> >> to make CPU clock switching work/"unbreak" Barebox on Vybrid.
> >
> > You mean you want to have this series on master, right?
> >
>
> I didn't really think about it, but yeah It probably would make sense
> to apply it to master.
Ok, just did that.
Sascha
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